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Performance prediction for embedded system design (master thesis topic)
Antonio Paolillo
Young Graduate of Université Libre de Bruxelles in Computer Science
apaolill@ulb.ac.be

Abstract

Digital embedded systems are under the pressure of numerous conflicting performances requirements: high power computing, low power consumption, etc. To handle them, there are a lot of different implementations of such systems, at application and platform level. Therefore, designers have to make design choices which will determine the final performances of the system. A lot of high level tools and methodologies which enable to guide design choices have already been investigated. However, in terms of performances, it remains difficult to rapidly estimate early in the design the low-level impact of these different choices. This seminar presents a methodology for creating costs models. This methodology is based on statistical machine learning techniques and is aimed at developing a library of standard digital signal processing components. Those models would help designers in the complex task of evaluating the link between high-level design choices and resulting system performances. This seminar's main work consi sts in an application of the methodology on a simple case study : the Fast Fourier Transform algorithm deployed on FPGA platforms.

Keywords

embedded system, digital system design, machine learning, linear models, performance, design choices